Language:

Electronics Fun archive
Date : April 2013

Clock generation in FPGA with phase accumulator. Calculation and limits.

Tags: No Tags
Comments: No Comments
Published on: 13/04/2013

In my project of a modern replica of a retro computer “Agat-7” I needed to generate several different clocks. Some of them can be produced by the PLL built in FPGA, others are a simple division of the main clock. But there is another group of clock signals that are not as simple to get.[…]

Recent Tweets
Welcome , today is Wednesday, 29/03/2017